vitis2024.2 fpga configuration failed. done pin is not high - SERP Analysis

https://adaptivesupport.amd.com/s/question/0D52E00006hpMDdSAM/fpga-configuration-failed-done-pin-is-not-high?language=en_US

https://forum.digilent.com/topic/26796-done-pin-is-not-high/

https://community.element14.com/products/devtools/avnetboardscommunity/avnetboard-forums/f/microzed-hardware-design/54278/newbie-problem-done-pin-not-high-on-fpga-write

https://adaptivesupport.amd.com/s/question/0D54U000092EWsDSAW/i-used-vivado20242-but-i-cant-find-and-set-drive-done-pin-high-as-impact-configso-can-you-tell-me-how-to-set-like-ise147s-impact?language=en_US

https://ez.analog.com/adieducation/university-program/f/q-a/580394/done-pin-did-not-go-high-error

https://forums.opalkelly.com/t/xem3001v2-configuration-failed-done-did-not-go-high/820

https://blog.csdn.net/q1508014114/article/details/141894070

https://www.edaboard.com/threads/done-pin-didnt-get-high-error-when-programming-spartan-2-in-slave-serial-mode.82401/

https://www.xilinx.com/support/documents/sw_manuals/xilinx2022_1/ug899-vivado-io-clock-planning.pdf

https://community.intel.com/t5/Programmable-Devices/CONF-DONE-pin-failed-to-go-high-problem/td-p/1584307

https://discuss.pynq.io/t/pynq-z2-board-cannot-program-the-target-device/1645

https://www.reddit.com/r/FPGA/comments/1c95vj8/is_vivado_a_joke/

https://digilent.com/reference/programmable-logic/guides/getting-started-with-ipi?srsltid=AfmBOoog5pKWnrlvM1_ORk6-86if1EZUGxv0vLDCuYTFHg-DtO880pbP

https://xilinx-wiki.atlassian.net/wiki/spaces/A/pages/2037088327/Versal%2BPlatform%2BLoader%2Band%2BManager

https://www.xilinx.com/support/documents/sw_manuals/xilinx2022_2/ug1399-vitis-hls.pdf

https://blog.csdn.net/qq_45057368/article/details/125046912

https://www.eevblog.com/forum/fpga/how-to-set-base-address-in-vitis-vivado/

https://forum.trenz-electronic.de/index.php?topic=1455.0

http://ebook.pldworld.com/_Semiconductors/XILINX/DataSource%20CD-ROM/Rev.1%20(Q2-2000)/docs/rp0006b/rp06b7e.htm

https://www.reddit.com/r/embedded/comments/rcmgvr/question_about_the_fpga_done_signal/

https://electronics.stackexchange.com/questions/198163/can-not-keep-pin-low-during-fpga-configuration